%0 Conference Paper %1 conf/vlsi-dat/HouLLKCW13 %A Hou, Chih-Sheng %A Li, Jin-Fu %A Lo, Chih-Yen %A Kwai, Ding-Ming %A Chou, Yung-Fa %A Wu, Cheng-Wen %B VLSI-DAT %D 2013 %I IEEE %K dblp %P 1-4 %T An FPGA-based test platform for analyzing data retention time distribution of DRAMs. %U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2013.html#HouLLKCW13 %@ 978-1-4673-4435-7

@inproceedings{conf/vlsi-dat/HouLLKCW13, added-at = {2023-10-17T00:00:00.000+0200}, author = {Hou, Chih-Sheng and Li, Jin-Fu and Lo, Chih-Yen and Kwai, Ding-Ming and Chou, Yung-Fa and Wu, Cheng-Wen}, biburl = {https://www.bibsonomy.org/bibtex/2267aef9e3fb55c17fb7bbba83f86e085/dblp}, booktitle = {VLSI-DAT}, crossref = {conf/vlsi-dat/2013}, ee = {https://doi.org/10.1109/VLDI-DAT.2013.6533853}, interhash = {bc07e00cc51daf76305d2fbb6e861e77}, intrahash = {267aef9e3fb55c17fb7bbba83f86e085}, isbn = {978-1-4673-4435-7}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-10T19:49:59.000+0200}, title = {An FPGA-based test platform for analyzing data retention time distribution of DRAMs.}, url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2013.html#HouLLKCW13}, year = 2013 }