%0 Journal Article %1 journals/ieicet/XuSIO19 %A Xu, Hongjie %A Shiomi, Jun %A Ishihara, Tohru %A Onodera, Hidetoshi %D 2019 %J IEICE Trans. Fundam. Electron. Commun. Comput. Sci. %K dblp %N 12 %P 1741-1750 %T On-Chip Cache Architecture Exploiting Hybrid Memory Structures for Near-Threshold Computing. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet102a.html#XuSIO19 %V 102-A

@article{journals/ieicet/XuSIO19, added-at = {2021-01-18T00:00:00.000+0100}, author = {Xu, Hongjie and Shiomi, Jun and Ishihara, Tohru and Onodera, Hidetoshi}, biburl = {https://www.bibsonomy.org/bibtex/229f97fc2dc6f5b1569e15c7c4a7a0ff6/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e102-a_12_1741}, interhash = {b8ae5fbecc669e754db40e72fbd20113}, intrahash = {29f97fc2dc6f5b1569e15c7c4a7a0ff6}, journal = {IEICE Trans. Fundam. Electron. Commun. Comput. Sci.}, keywords = {dblp}, number = 12, pages = {1741-1750}, timestamp = {2024-04-08T15:49:55.000+0200}, title = {On-Chip Cache Architecture Exploiting Hybrid Memory Structures for Near-Threshold Computing.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet102a.html#XuSIO19}, volume = {102-A}, year = 2019 }