%0 Conference Paper %1 Sekanina:2006:CEC %A Sekanina, Lukas %A Martinek, Tomas %A Gajda, Zbysek %B Proceedings of the 2006 IEEE Congress on Evolutionary Computation %C Vancouver %D 2006 %E Yen, Gary G. %E Wang, Lipo %E Bonissone, Piero %E Lucas, Simon M. %I IEEE Press %K Cartesian VHDL algorithms, genetic programming, %P 9676--9683 %T Extrinsic and Intrinsic Evolution of Multifunctional Combinational %U http://www.fit.vutbr.cz/~sekanina/publ/cec06/cec06.pdf %X Multifunctional digital circuits are circuits composed of polymorphic (multifunctional) gates. In addition to its standard logic function (such as NAND), a polymorphic gate exhibits another logic function (such as NOR) which is activated under a specific condition, for example, when Vdd, temperature or illumination reaches a certain level. This paper describes the evolutionary design of multifunctional combinational circuits at the gate level using a circuit simulator and in a field programmable gate array (FPGA). The FPGA based implementation exhibits a significant speedup against a highly optimised software simulator. %@ 0-7803-9487-9

@inproceedings{Sekanina:2006:CEC, abstract = {Multifunctional digital circuits are circuits composed of polymorphic (multifunctional) gates. In addition to its standard logic function (such as NAND), a polymorphic gate exhibits another logic function (such as NOR) which is activated under a specific condition, for example, when Vdd, temperature or illumination reaches a certain level. This paper describes the evolutionary design of multifunctional combinational circuits at the gate level using a circuit simulator and in a field programmable gate array (FPGA). The FPGA based implementation exhibits a significant speedup against a highly optimised software simulator.}, added-at = {2008-06-19T17:35:00.000+0200}, address = {Vancouver}, author = {Sekanina, Lukas and Martinek, Tomas and Gajda, Zbysek}, biburl = {https://www.bibsonomy.org/bibtex/23217c4499d4d94a69e9d8080e14d8b8e/brazovayeye}, booktitle = {Proceedings of the 2006 IEEE Congress on Evolutionary Computation}, editor = {Yen, Gary G. and Wang, Lipo and Bonissone, Piero and Lucas, Simon M.}, interhash = {276ed9285db36c07af225ec76f281a33}, intrahash = {3217c4499d4d94a69e9d8080e14d8b8e}, isbn = {0-7803-9487-9}, keywords = {Cartesian VHDL algorithms, genetic programming,}, month = {6-21 July}, notes = {WCCI 2006 - A joint meeting of the IEEE, the EPS, and the IEE. IEEE Catalog Number: 06TH8846D COMBO6 is a PCI card. Virtex FPGA XC2V3000bf957 chip.}, pages = {9676--9683}, publisher = {IEEE Press}, size = {8 pages}, timestamp = {2008-06-19T17:51:20.000+0200}, title = {Extrinsic and Intrinsic Evolution of Multifunctional Combinational}, url = {http://www.fit.vutbr.cz/~sekanina/publ/cec06/cec06.pdf}, year = 2006 }