%0 Journal Article %1 journals/jssc/KimKKKK06 %A Kim, Jin-Han %A Kwak, Young-Ho %A young Kim, Moo %A Kim, Soo-Won %A Kim, Chulwoo %D 2006 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 2077-2082 %T A 120-MHz-1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling. %U http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#KimKKKK06 %V 41

@article{journals/jssc/KimKKKK06, added-at = {2021-10-15T00:00:00.000+0200}, author = {Kim, Jin-Han and Kwak, Young-Ho and young Kim, Moo and Kim, Soo-Won and Kim, Chulwoo}, biburl = {https://www.bibsonomy.org/bibtex/233cd8706277d19b1470f986494f5366e/dblp}, ee = {https://doi.org/10.1109/JSSC.2006.880609}, interhash = {ec6e97a62a1d5785f8160f0a02b4642d}, intrahash = {33cd8706277d19b1470f986494f5366e}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = {2077-2082}, timestamp = {2024-04-08T10:44:25.000+0200}, title = {A 120-MHz-1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#KimKKKK06}, volume = 41, year = 2006 }