%0 Journal Article %1 journals/jcsc/SahaniSA20 %A Sahani, Jagdeep Kaur %A Singh, Anil %A Agarwal, Alpana %D 2020 %J Journal of Circuits, Systems, and Computers %K dblp %N 8 %P 2050130:1-2050130:15 %T A 2.3 mW Multi-Frequency Clock Generator with -137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc29.html#SahaniSA20 %V 29

@article{journals/jcsc/SahaniSA20, added-at = {2020-07-08T00:00:00.000+0200}, author = {Sahani, Jagdeep Kaur and Singh, Anil and Agarwal, Alpana}, biburl = {https://www.bibsonomy.org/bibtex/2349f3f3a36602731741a209af328993e/dblp}, ee = {https://doi.org/10.1142/S0218126620501303}, interhash = {5f6c9bfc48a38dcab00fdf64fce3001b}, intrahash = {349f3f3a36602731741a209af328993e}, journal = {Journal of Circuits, Systems, and Computers}, keywords = {dblp}, number = 8, pages = {2050130:1-2050130:15}, timestamp = {2020-07-09T11:40:58.000+0200}, title = {A 2.3 mW Multi-Frequency Clock Generator with -137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc29.html#SahaniSA20}, volume = 29, year = 2020 }