%0 Conference Paper %1 conf/asicon/LiuJDLHL13 %A Liu, Ningxi %A Jiang, Yu %A Dong, Qing %A Li, Hui %A Hu, Xinyi %A Lin, Yinyin %B ASICON %D 2013 %I IEEE %K dblp %P 1-4 %T Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2013.html#LiuJDLHL13 %@ 978-1-4673-6415-7

@inproceedings{conf/asicon/LiuJDLHL13, added-at = {2015-02-23T00:00:00.000+0100}, author = {Liu, Ningxi and Jiang, Yu and Dong, Qing and Li, Hui and Hu, Xinyi and Lin, Yinyin}, biburl = {https://www.bibsonomy.org/bibtex/23b257f805f1f8458004d452a7bac126c/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2013}, ee = {http://dx.doi.org/10.1109/ASICON.2013.6811968}, interhash = {02c399a990a30d8b83204cda81e7750b}, intrahash = {3b257f805f1f8458004d452a7bac126c}, isbn = {978-1-4673-6415-7}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2015-06-19T16:17:58.000+0200}, title = {Low-power high-yield SRAM design with VSS adaptive boosting and BL capacitance variation sensing.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2013.html#LiuJDLHL13}, year = 2013 }