%0 Journal Article %1 journals/tcad/KadayifNKS07 %A Kadayif, Ismail %A Nath, Partho %A Kandemir, Mahmut T. %A Sivasubramaniam, Anand %D 2007 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 2 %P 312-324 %T Reducing Data TLB Power via Compiler-Directed Address Generation. %U http://dblp.uni-trier.de/db/journals/tcad/tcad26.html#KadayifNKS07 %V 26

@article{journals/tcad/KadayifNKS07, added-at = {2023-08-28T00:00:00.000+0200}, author = {Kadayif, Ismail and Nath, Partho and Kandemir, Mahmut T. and Sivasubramaniam, Anand}, biburl = {https://www.bibsonomy.org/bibtex/23dddbb884018c35530bf99c13884d08b/dblp}, ee = {https://www.wikidata.org/entity/Q121009373}, interhash = {1f3ac5992ab3aa41cfd0ed008fc5410a}, intrahash = {3dddbb884018c35530bf99c13884d08b}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 2, pages = {312-324}, timestamp = {2024-04-08T19:45:30.000+0200}, title = {Reducing Data TLB Power via Compiler-Directed Address Generation.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad26.html#KadayifNKS07}, volume = 26, year = 2007 }