This paper presents an implementation of Genetic
Programming using a Field Programmable Gate Array. This
novel implementation uses a high level language to
hardware compilation system, called Handel-C, to
produce a Field Programmable Logic Array capable of
performing all the functions required of a Genetic
Programming System. Two simple test problems
demonstrate that GP running on a Field Programmable
Gate Array can outperform a software version of the
same algorithm by exploiting the intrinsic parallelism
available using hardware, and the geometric
parallelisation of Genetic Programming.
%0 Journal Article
%1 martin:2001:GPEM
%A Martin, Peter
%D 2001
%J Genetic Programming and Evolvable Machines
%K FPGA, Handel-C, algorithm algorithms, evolvable genetic hardware, parallel programming,
%N 4
%P 317--343
%R doi:10.1023/A:1012942304464
%T A Hardware Implementation of a Genetic Programming
System Using FPGAs and Handel-C
%U http://citeseer.ist.psu.edu/568511.html
%V 2
%X This paper presents an implementation of Genetic
Programming using a Field Programmable Gate Array. This
novel implementation uses a high level language to
hardware compilation system, called Handel-C, to
produce a Field Programmable Logic Array capable of
performing all the functions required of a Genetic
Programming System. Two simple test problems
demonstrate that GP running on a Field Programmable
Gate Array can outperform a software version of the
same algorithm by exploiting the intrinsic parallelism
available using hardware, and the geometric
parallelisation of Genetic Programming.
@article{martin:2001:GPEM,
abstract = {This paper presents an implementation of Genetic
Programming using a Field Programmable Gate Array. This
novel implementation uses a high level language to
hardware compilation system, called Handel-C, to
produce a Field Programmable Logic Array capable of
performing all the functions required of a Genetic
Programming System. Two simple test problems
demonstrate that GP running on a Field Programmable
Gate Array can outperform a software version of the
same algorithm by exploiting the intrinsic parallelism
available using hardware, and the geometric
parallelisation of Genetic Programming.},
added-at = {2008-06-19T17:35:00.000+0200},
author = {Martin, Peter},
biburl = {https://www.bibsonomy.org/bibtex/248832f4d3c0dc3fede700e3ea42497b9/brazovayeye},
doi = {doi:10.1023/A:1012942304464},
interhash = {a86bb7b1fb8ccbe230403dd2003795f2},
intrahash = {48832f4d3c0dc3fede700e3ea42497b9},
issn = {1389-2576},
journal = {Genetic Programming and Evolvable Machines},
keywords = {FPGA, Handel-C, algorithm algorithms, evolvable genetic hardware, parallel programming,},
month = {December},
notes = {Xilinx BG560 FPGA XCV2000e, Celoxica RC1000 FPGA
board. See also \cite{martin:2002:EuroGP} Article ID:
386361},
number = 4,
pages = {317--343},
timestamp = {2008-06-19T17:46:24.000+0200},
title = {A Hardware Implementation of a Genetic Programming
System Using {FPGAs} and {Handel-C}},
url = {http://citeseer.ist.psu.edu/568511.html},
volume = 2,
year = 2001
}