%0 Conference Paper %1 conf/iscas/GarimellaRLC08 %A Garimella, Sri Raga Sudha %A Ramírez-Angulo, Jaime %A López-Martín, Antonio J. %A Carvajal, Ramón González %B ISCAS %D 2008 %I IEEE %K dblp %P 1492-1495 %T Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2008.html#GarimellaRLC08 %@ 978-1-4244-1684-4

@inproceedings{conf/iscas/GarimellaRLC08, added-at = {2019-10-19T00:00:00.000+0200}, author = {Garimella, Sri Raga Sudha and Ramírez-Angulo, Jaime and López-Martín, Antonio J. and Carvajal, Ramón González}, biburl = {https://www.bibsonomy.org/bibtex/2494828ab1f8e5ebc0e1f11ba656d9f85/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2008}, ee = {https://doi.org/10.1109/ISCAS.2008.4541712}, interhash = {16b45b3ba0e919a3e24cb0286c9b4028}, intrahash = {494828ab1f8e5ebc0e1f11ba656d9f85}, isbn = {978-1-4244-1684-4}, keywords = {dblp}, pages = {1492-1495}, publisher = {IEEE}, timestamp = {2019-10-22T14:52:15.000+0200}, title = {Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2008.html#GarimellaRLC08}, year = 2008 }