%0 Conference Paper %1 conf/vdat/SarkarK15 %A Sarkar, Hari %A Kundu, Sudakshina %B VDAT %D 2015 %I IEEE Computer Society %K dblp %P 1-6 %T Standby leakage current estimation model for multi threshold CMOS inverter circuit in deep submicron technology. %U http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#SarkarK15 %@ 978-1-4799-1743-3

@inproceedings{conf/vdat/SarkarK15, added-at = {2023-03-24T00:00:00.000+0100}, author = {Sarkar, Hari and Kundu, Sudakshina}, biburl = {https://www.bibsonomy.org/bibtex/251663351b612d809e6d794220c5ff626/dblp}, booktitle = {VDAT}, crossref = {conf/vdat/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVDAT.2015.7208141}, interhash = {45f422c2baeaf1c4ddd6bbe806ced904}, intrahash = {51663351b612d809e6d794220c5ff626}, isbn = {978-1-4799-1743-3}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T13:46:11.000+0200}, title = {Standby leakage current estimation model for multi threshold CMOS inverter circuit in deep submicron technology.}, url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2015.html#SarkarK15}, year = 2015 }