%0 Journal Article %1 journals/tcad/PomeranzV20 %A Pomeranz, Irith %A Venkataraman, Srikanth %D 2020 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 12 %P 5261-5266 %T LFSR-Based Test Generation for Reduced Fail Data Volume. %U http://dblp.uni-trier.de/db/journals/tcad/tcad39.html#PomeranzV20 %V 39

@article{journals/tcad/PomeranzV20, added-at = {2020-12-01T00:00:00.000+0100}, author = {Pomeranz, Irith and Venkataraman, Srikanth}, biburl = {https://www.bibsonomy.org/bibtex/2558226e6c40253101ab2b042a9168782/dblp}, ee = {https://doi.org/10.1109/TCAD.2020.2971527}, interhash = {222f335b88f1314f341f2cb3b35ebd95}, intrahash = {558226e6c40253101ab2b042a9168782}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 12, pages = {5261-5266}, timestamp = {2024-04-08T19:46:00.000+0200}, title = {LFSR-Based Test Generation for Reduced Fail Data Volume.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad39.html#PomeranzV20}, volume = 39, year = 2020 }