%0 Thesis %1 phd/ndltd/Lopes12 %A Lopes, Joelmir José %D 2012 %K dblp %T ChipCflow - a tool to executing algorithms using dynamic dataflow architecture in FPGA.

@phdthesis{phd/ndltd/Lopes12, added-at = {2017-08-15T00:00:00.000+0200}, author = {Lopes, Joelmir José}, biburl = {https://www.bibsonomy.org/bibtex/25f91acbc6f905253b682cf1a0d0b05ae/dblp}, ee = {http://search.ndltd.org/show.php?id=oai:union.ndltd.org:IBICT/oai:agregador.ibict.br.BDTD_USP:oai:teses.usp.br:tde-05122012-154304}, interhash = {f30cab3ed8ae74bcf4ad39a0041c7a38}, intrahash = {5f91acbc6f905253b682cf1a0d0b05ae}, keywords = {dblp}, note = {ndltd.org (oai:agregador.ibict.br.BDTD_USP:oai:teses.usp.br:tde-05122012-154304)}, school = {University of São Paulo, Brazil}, timestamp = {2017-08-16T11:37:51.000+0200}, title = {ChipCflow - a tool to executing algorithms using dynamic dataflow architecture in FPGA.}, year = 2012 }