%0 Journal Article %1 journals/integration/MaheshwariBK19 %A Maheshwari, Sachin %A Bartlett, Vivian A. %A Kale, Izzet %D 2019 %J Integr. %K dblp %P 144-154 %T Modelling, simulation and verification of 4-phase adiabatic logic design: A VHDL-Based approach. %U http://dblp.uni-trier.de/db/journals/integration/integration67.html#MaheshwariBK19 %V 67

@article{journals/integration/MaheshwariBK19, added-at = {2020-02-20T00:00:00.000+0100}, author = {Maheshwari, Sachin and Bartlett, Vivian A. and Kale, Izzet}, biburl = {https://www.bibsonomy.org/bibtex/26464f60d13a6f39a6748855236706521/dblp}, ee = {https://doi.org/10.1016/j.vlsi.2019.01.007}, interhash = {658d8031dd5cb05ec78107de504e36e4}, intrahash = {6464f60d13a6f39a6748855236706521}, journal = {Integr.}, keywords = {dblp}, pages = {144-154}, timestamp = {2020-02-21T11:52:48.000+0100}, title = {Modelling, simulation and verification of 4-phase adiabatic logic design: A VHDL-Based approach.}, url = {http://dblp.uni-trier.de/db/journals/integration/integration67.html#MaheshwariBK19}, volume = 67, year = 2019 }