%0 Conference Paper %1 conf/vlsid/BhardwajV07 %A Bhardwaj, Sarvesh %A Vrudhula, Sarma B. K. %B VLSI Design %D 2007 %I IEEE Computer Society %K dblp %P 589-594 %T A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#BhardwajV07 %@ 0-7695-2762-0

@inproceedings{conf/vlsid/BhardwajV07, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bhardwaj, Sarvesh and Vrudhula, Sarma B. K.}, biburl = {https://www.bibsonomy.org/bibtex/26b417b4bf40f5f99bd734998443be904/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2007}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2007.11}, interhash = {5b0bcf0e7a3bb1285ac12e925ade574d}, intrahash = {6b417b4bf40f5f99bd734998443be904}, isbn = {0-7695-2762-0}, keywords = {dblp}, pages = {589-594}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:09.000+0200}, title = {A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#BhardwajV07}, year = 2007 }