%0 Conference Paper %1 conf/fpl/SchieferK05 %A Schiefer, Artur %A Kebschull, Udo %B FPL %D 2005 %E Rissa, Tero %E Wilton, Steven J. E. %E Leong, Philip Heng Wai %I IEEE %K dblp %P 551-554 %T Optimization of Start-Up Time and Quiescent Power Consumption of FPGAs. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#SchieferK05 %@ 0-7803-9362-7

@inproceedings{conf/fpl/SchieferK05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Schiefer, Artur and Kebschull, Udo}, biburl = {https://www.bibsonomy.org/bibtex/26bba08d4f4e2f30f3ab3fa730517c6d2/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2005}, editor = {Rissa, Tero and Wilton, Steven J. E. and Leong, Philip Heng Wai}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPL.2005.1515783}, interhash = {ffeb9f3a8d10afffe682ac328885f054}, intrahash = {6bba08d4f4e2f30f3ab3fa730517c6d2}, isbn = {0-7803-9362-7}, keywords = {dblp}, pages = {551-554}, publisher = {IEEE}, timestamp = {2024-04-10T14:52:35.000+0200}, title = {Optimization of Start-Up Time and Quiescent Power Consumption of FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#SchieferK05}, year = 2005 }