%0 Journal Article %1 journals/tcas/LuoCCHCCCLC14 %A Luo, Shien-Chun %A Chang, Kuo-Chiang %A Chen, Ming-Pin %A Huang, Ching-Ji %A Chiu, Yi-Fang %A Chen, Po-Hsun %A Cheng, Liang-Chia %A Liu, Chih-Wei %A Chu, Yuan-Hua %D 2014 %J IEEE Trans. Circuits Syst. II Express Briefs %K dblp %N 12 %P 947-951 %T Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII61.html#LuoCCHCCCLC14 %V 61-II

@article{journals/tcas/LuoCCHCCCLC14, added-at = {2020-05-27T00:00:00.000+0200}, author = {Luo, Shien-Chun and Chang, Kuo-Chiang and Chen, Ming-Pin and Huang, Ching-Ji and Chiu, Yi-Fang and Chen, Po-Hsun and Cheng, Liang-Chia and Liu, Chih-Wei and Chu, Yuan-Hua}, biburl = {https://www.bibsonomy.org/bibtex/2763429c8ae2ad9e7b68f896f81fbeaa8/dblp}, ee = {https://doi.org/10.1109/TCSII.2014.2356913}, interhash = {ae25861f4c45f3d32d51941811e4281c}, intrahash = {763429c8ae2ad9e7b68f896f81fbeaa8}, journal = {IEEE Trans. Circuits Syst. II Express Briefs}, keywords = {dblp}, number = 12, pages = {947-951}, timestamp = {2020-05-28T11:52:14.000+0200}, title = {Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII61.html#LuoCCHCCCLC14}, volume = {61-II}, year = 2014 }