%0 Conference Paper %1 conf/fpl/BieserBHSM06 %A Bieser, Carsten %A Bahlinger, Martin %A Heinz, Matthias %A Stops, Christian %A Müller-Glaser, Klaus D. %B FPL %D 2006 %I IEEE %K dblp %P 1-4 %T A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#BieserBHSM06 %@ 1-4244-0312-X

@inproceedings{conf/fpl/BieserBHSM06, added-at = {2017-05-21T00:00:00.000+0200}, author = {Bieser, Carsten and Bahlinger, Martin and Heinz, Matthias and Stops, Christian and Müller-Glaser, Klaus D.}, biburl = {https://www.bibsonomy.org/bibtex/2827c193727b9c62d3c81d3220a4a7bd8/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2006}, ee = {https://doi.org/10.1109/FPL.2006.311294}, interhash = {20ba7e31cd58c7e002a3d38d82359ace}, intrahash = {827c193727b9c62d3c81d3220a4a7bd8}, isbn = {1-4244-0312-X}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T19:14:15.000+0200}, title = {A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#BieserBHSM06}, year = 2006 }