%0 Conference Paper %1 conf/fpl/ChinLW06 %A Chin, Scott Y. L. %A Lee, Clarence S. P. %A Wilton, Steven J. E. %B FPL %D 2006 %I IEEE %K dblp %P 1-8 %T Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#ChinLW06 %@ 1-4244-0312-X

@inproceedings{conf/fpl/ChinLW06, added-at = {2017-05-21T00:00:00.000+0200}, author = {Chin, Scott Y. L. and Lee, Clarence S. P. and Wilton, Steven J. E.}, biburl = {https://www.bibsonomy.org/bibtex/28a21e15d0a8c563a5c6a583bdb74d5dd/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2006}, ee = {https://doi.org/10.1109/FPL.2006.311200}, interhash = {74b0967610e77935cc51acce5aacfea2}, intrahash = {8a21e15d0a8c563a5c6a583bdb74d5dd}, isbn = {1-4244-0312-X}, keywords = {dblp}, pages = {1-8}, publisher = {IEEE}, timestamp = {2019-10-17T19:14:15.000+0200}, title = {Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#ChinLW06}, year = 2006 }