%0 Conference Paper %1 conf/vlsi-dat/ChungS17 %A Chung, Yung-Hui %A Shih, Song-You %B VLSI-DAT %D 2017 %I IEEE %K dblp %P 1-4 %T A 10-bit 100-MS/s SAR ADC with capacitor swapping technique in 90-nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2017.html#ChungS17 %@ 978-1-5090-3969-2

@inproceedings{conf/vlsi-dat/ChungS17, added-at = {2017-06-20T00:00:00.000+0200}, author = {Chung, Yung-Hui and Shih, Song-You}, biburl = {https://www.bibsonomy.org/bibtex/28b82aa866de024148adee6af208956eb/dblp}, booktitle = {VLSI-DAT}, crossref = {conf/vlsi-dat/2017}, ee = {https://doi.org/10.1109/VLSI-DAT.2017.7939661}, interhash = {f5c39f634d568304706eb68b1bf353f0}, intrahash = {8b82aa866de024148adee6af208956eb}, isbn = {978-1-5090-3969-2}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2017-06-21T11:38:49.000+0200}, title = {A 10-bit 100-MS/s SAR ADC with capacitor swapping technique in 90-nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2017.html#ChungS17}, year = 2017 }