%0 Conference Paper %1 conf/vlsid/GuptaE05 %A Gupta, Nitin %A Edwards, Doug A. %B VLSI Design %D 2005 %I IEEE Computer Society %K dblp %P 799-803 %T Synthesis of Asynchronous Circuits Using Early Data Validity. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#GuptaE05 %@ 0-7695-2264-5

@inproceedings{conf/vlsid/GuptaE05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Gupta, Nitin and Edwards, Doug A.}, biburl = {https://www.bibsonomy.org/bibtex/290f15594bed9bff24a0252b4e090c148/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2005.156}, interhash = {f65496ffa3968a5db34c4e7572f97a50}, intrahash = {90f15594bed9bff24a0252b4e090c148}, isbn = {0-7695-2264-5}, keywords = {dblp}, pages = {799-803}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:41.000+0200}, title = {Synthesis of Asynchronous Circuits Using Early Data Validity.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#GuptaE05}, year = 2005 }