%0 Conference Paper %1 conf/aspdac/YipBBS07 %A Yip, Wai-Yeung %A Best, Scott %A Beyene, Wendemagegnehu T. %A Schmitt, Ralf %B ASP-DAC %D 2007 %I IEEE Computer Society %K dblp %P 858-865 %T System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2007.html#YipBBS07 %@ 1-4244-0629-3

@inproceedings{conf/aspdac/YipBBS07, added-at = {2023-03-23T00:00:00.000+0100}, author = {Yip, Wai-Yeung and Best, Scott and Beyene, Wendemagegnehu T. and Schmitt, Ralf}, biburl = {https://www.bibsonomy.org/bibtex/292b6c835dab08a48b4029138b9c54bbc/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2007}, ee = {http://dl.acm.org/citation.cfm?id=1323364}, interhash = {858221cb04fc72ef033f0b39e5ecde54}, intrahash = {92b6c835dab08a48b4029138b9c54bbc}, isbn = {1-4244-0629-3}, keywords = {dblp}, pages = {858-865}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:16:52.000+0200}, title = {System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2007.html#YipBBS07}, year = 2007 }