%0 Conference Paper %1 conf/date/PomeranzR00 %A Pomeranz, Irith %A Reddy, Sudhakar M. %B DATE %D 2000 %E Bolsens, Ivo %I IEEE Computer Society / ACM %K dblp %P 298-304 %T Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits. %U http://dblp.uni-trier.de/db/conf/date/date2000.html#PomeranzR00 %@ 0-7695-0537-6

@inproceedings{conf/date/PomeranzR00, added-at = {2023-03-24T00:00:00.000+0100}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/29edde1efd0c71903e0ff7fb3fdc5af37/dblp}, booktitle = {DATE}, crossref = {conf/date/2000}, editor = {Bolsens, Ivo}, ee = {https://doi.org/10.1145/343647.343785}, interhash = {d882fd13d606c3d19da4cec304386c2e}, intrahash = {9edde1efd0c71903e0ff7fb3fdc5af37}, isbn = {0-7695-0537-6}, keywords = {dblp}, pages = {298-304}, publisher = {IEEE Computer Society / ACM}, timestamp = {2024-04-10T06:52:58.000+0200}, title = {Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits.}, url = {http://dblp.uni-trier.de/db/conf/date/date2000.html#PomeranzR00}, year = 2000 }