%0 Conference Paper %1 conf/vlsid/LinPR98 %A Lin, Xijiang %A Pomeranz, Irith %A Reddy, Sudhakar M. %B VLSI Design %D 1998 %I IEEE Computer Society %K dblp %P 456-463 %T MIX: A Test Generation System for Synchronous Sequential Circuits. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1998.html#LinPR98 %@ 0-8186-8224-8

@inproceedings{conf/vlsid/LinPR98, added-at = {2023-03-24T00:00:00.000+0100}, author = {Lin, Xijiang and Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/2a06996507563f798a6ba6bbbf172e3be/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1998}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1998.646649}, interhash = {975315c56a785f354a2ecb3209da0031}, intrahash = {a06996507563f798a6ba6bbbf172e3be}, isbn = {0-8186-8224-8}, keywords = {dblp}, pages = {456-463}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:47:35.000+0200}, title = {MIX: A Test Generation System for Synchronous Sequential Circuits.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1998.html#LinPR98}, year = 1998 }