%0 Conference Paper %1 conf/vlsi-dat/LiuYCCCWH12 %A Liu, Yi-Jun %A Yang, Chih-Chyau %A Chen, Shih-Lun %A Chiu, Chun-Chieh %A Wu, Chien-Ming %A Huang, Chun-Ming %B VLSI-DAT %D 2012 %I IEEE %K dblp %P 1-4 %T An efficient memory controller for 3D heterogeneous integration platform. %U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2012.html#LiuYCCCWH12 %@ 978-1-4577-2080-2

@inproceedings{conf/vlsi-dat/LiuYCCCWH12, added-at = {2015-09-30T00:00:00.000+0200}, author = {Liu, Yi-Jun and Yang, Chih-Chyau and Chen, Shih-Lun and Chiu, Chun-Chieh and Wu, Chien-Ming and Huang, Chun-Ming}, biburl = {https://www.bibsonomy.org/bibtex/2a4b9873ba0804cc9f640d24ad2b4ccb5/dblp}, booktitle = {VLSI-DAT}, crossref = {conf/vlsi-dat/2012}, ee = {http://dx.doi.org/10.1109/VLSI-DAT.2012.6212619}, interhash = {13277d854283138c423fa9404ac825dc}, intrahash = {a4b9873ba0804cc9f640d24ad2b4ccb5}, isbn = {978-1-4577-2080-2}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2015-10-01T11:35:32.000+0200}, title = {An efficient memory controller for 3D heterogeneous integration platform.}, url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2012.html#LiuYCCCWH12}, year = 2012 }