%0 Conference Paper %1 conf/vlsit/BreilLAJVNBPLGG23 %A Breil, N. %A Lee, B.-C. %A Avendano, J. Avila %A Jewell, J. %A Vellaikal, M. %A Newman, E. %A Bazizi, E. M. %A Pal, A. %A Liu, L. %A Gluschenkov, Oleg %A Greene, A. %A Mochizuki, S. %A Loubet, Nicolas %A Colombeau, B. %A Haran, B. %B VLSI Technology and Circuits %D 2023 %I IEEE %K dblp %P 1-2 %T Contact Cavity Shaping and Selective SiGe: B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#BreilLAJVNBPLGG23 %@ 978-4-86348-806-9

@inproceedings{conf/vlsit/BreilLAJVNBPLGG23, added-at = {2023-09-08T00:00:00.000+0200}, author = {Breil, N. and Lee, B.-C. and Avendano, J. Avila and Jewell, J. and Vellaikal, M. and Newman, E. and Bazizi, E. M. and Pal, A. and Liu, L. and Gluschenkov, Oleg and Greene, A. and Mochizuki, S. and Loubet, Nicolas and Colombeau, B. and Haran, B.}, biburl = {https://www.bibsonomy.org/bibtex/2a4eef3fc2b179991c0c9681f9fedd22b/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2023}, ee = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185379}, interhash = {ed85c6ef365b8a852675bc30c5465722}, intrahash = {a4eef3fc2b179991c0c9681f9fedd22b}, isbn = {978-4-86348-806-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:01.000+0200}, title = {Contact Cavity Shaping and Selective SiGe: B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#BreilLAJVNBPLGG23}, year = 2023 }