%0 Journal Article %1 journals/tcasI/HanLLSGRZ24 %A Han, Haolin %A Liu, Shubin %A Liang, Hongzhi %A Shen, Yi %A Guo, Jianyu %A Ren, Ruili %A Zhu, Zhangming %D 2024 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 4 %P 1495-1505 %T A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC. %U http://dblp.uni-trier.de/db/journals/tcasI/tcasI71.html#HanLLSGRZ24 %V 71

@article{journals/tcasI/HanLLSGRZ24, added-at = {2024-04-15T00:00:00.000+0200}, author = {Han, Haolin and Liu, Shubin and Liang, Hongzhi and Shen, Yi and Guo, Jianyu and Ren, Ruili and Zhu, Zhangming}, biburl = {https://www.bibsonomy.org/bibtex/2a69b80ec67b83563c24d55230c5e46f9/dblp}, ee = {https://doi.org/10.1109/TCSI.2024.3354995}, interhash = {18bc20d0ee9bbfa05eb62895affed71e}, intrahash = {a69b80ec67b83563c24d55230c5e46f9}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, month = {April}, number = 4, pages = {1495-1505}, timestamp = {2024-04-22T07:07:08.000+0200}, title = {A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC.}, url = {http://dblp.uni-trier.de/db/journals/tcasI/tcasI71.html#HanLLSGRZ24}, volume = 71, year = 2024 }