%0 Conference Paper %1 conf/cisse/NovacVHCC08 %A Novac, Ovidiu-Constantin %A Vari-Kakas, St. %A Hathazi, F. I. %A Curila, Mircea %A Curila, Sorin %B SCSS (2) %D 2008 %E Elleithy, Khaled M. %I Springer %K dblp %P 539-543 %T Aspects Regarding the Implementation of Hsiao Code to the Cache Level of a Memory Hierarchy with Fpga Xilinx Circuits. %U http://dblp.uni-trier.de/db/conf/cisse/scss2008-2.html#NovacVHCC08 %@ 978-90-481-3659-9

@inproceedings{conf/cisse/NovacVHCC08, added-at = {2020-03-03T00:00:00.000+0100}, author = {Novac, Ovidiu-Constantin and Vari-Kakas, St. and Hathazi, F. I. and Curila, Mircea and Curila, Sorin}, biburl = {https://www.bibsonomy.org/bibtex/2afccb81d316ea5518777067539c7a6c3/dblp}, booktitle = {SCSS (2)}, crossref = {conf/cisse/2008scss2}, editor = {Elleithy, Khaled M.}, ee = {https://doi.org/10.1007/978-90-481-3660-5_92}, interhash = {f4f406014c64ef9177c9dc49f61cbbf7}, intrahash = {afccb81d316ea5518777067539c7a6c3}, isbn = {978-90-481-3659-9}, keywords = {dblp}, pages = {539-543}, publisher = {Springer}, timestamp = {2024-04-09T14:48:51.000+0200}, title = {Aspects Regarding the Implementation of Hsiao Code to the Cache Level of a Memory Hierarchy with Fpga Xilinx Circuits.}, url = {http://dblp.uni-trier.de/db/conf/cisse/scss2008-2.html#NovacVHCC08}, year = 2008 }