%0 Conference Paper %1 conf/vlsid/KulkarniGE11 %A Kulkarni, Parag %A Gupta, Puneet %A Ercegovac, Milos D. %B VLSI Design %D 2011 %I IEEE Computer Society %K dblp %P 346-351 %T Trading Accuracy for Power with an Underdesigned Multiplier Architecture. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#KulkarniGE11 %@ 978-0-7695-4348-2

@inproceedings{conf/vlsid/KulkarniGE11, added-at = {2023-03-24T00:00:00.000+0100}, author = {Kulkarni, Parag and Gupta, Puneet and Ercegovac, Milos D.}, biburl = {https://www.bibsonomy.org/bibtex/2bfad0ba93fe2eab43d28626a709900f2/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2011}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2011.51}, interhash = {0f83a66a6625e8f8f171631acef9a396}, intrahash = {bfad0ba93fe2eab43d28626a709900f2}, isbn = {978-0-7695-4348-2}, keywords = {dblp}, pages = {346-351}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:08:33.000+0200}, title = {Trading Accuracy for Power with an Underdesigned Multiplier Architecture.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#KulkarniGE11}, year = 2011 }