%0 Conference Paper %1 conf/iccel/FurukawaMSUS24 %A Furukawa, Daiki %A Manabe, Taito %A Shibata, Yuichiro %A Ueno, Tomohiro %A Sano, Kentaro %B ICCE %D 2024 %I IEEE %K dblp %P 1-6 %T HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator. %U http://dblp.uni-trier.de/db/conf/iccel/icce2024.html#FurukawaMSUS24 %@ 979-8-3503-2413-6

@inproceedings{conf/iccel/FurukawaMSUS24, added-at = {2024-03-08T00:00:00.000+0100}, author = {Furukawa, Daiki and Manabe, Taito and Shibata, Yuichiro and Ueno, Tomohiro and Sano, Kentaro}, biburl = {https://www.bibsonomy.org/bibtex/2c072e73d44263ac72f7ad0bd7fc31b5e/dblp}, booktitle = {ICCE}, crossref = {conf/iccel/2024}, ee = {https://doi.org/10.1109/ICCE59016.2024.10444277}, interhash = {e328c9f7bb02b7554fdde920f4ddf2a7}, intrahash = {c072e73d44263ac72f7ad0bd7fc31b5e}, isbn = {979-8-3503-2413-6}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2024-04-10T01:19:31.000+0200}, title = {HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator.}, url = {http://dblp.uni-trier.de/db/conf/iccel/icce2024.html#FurukawaMSUS24}, year = 2024 }