%0 Conference Paper %1 conf/i2mtc/RamagundamDMBGA14 %A Ramagundam, Shashisekhar %A Das, Sunil R. %A Morton, Scott %A Biswas, Satyendra N. %A Groza, Voicu %A Assaf, Mansour H. %A Petriu, Emil M. %B I2MTC %D 2014 %I IEEE %K dblp %P 10-15 %T Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture. %U http://dblp.uni-trier.de/db/conf/i2mtc/i2mtc2014.html#RamagundamDMBGA14

@inproceedings{conf/i2mtc/RamagundamDMBGA14, added-at = {2019-10-19T00:00:00.000+0200}, author = {Ramagundam, Shashisekhar and Das, Sunil R. and Morton, Scott and Biswas, Satyendra N. and Groza, Voicu and Assaf, Mansour H. and Petriu, Emil M.}, biburl = {https://www.bibsonomy.org/bibtex/2d05e9731732cee9a80ac5da59f1e4b80/dblp}, booktitle = {I2MTC}, crossref = {conf/i2mtc/2014}, ee = {https://doi.org/10.1109/I2MTC.2014.6860513}, interhash = {28a43e4fb2454f88b167fb493c8b1c2a}, intrahash = {d05e9731732cee9a80ac5da59f1e4b80}, keywords = {dblp}, pages = {10-15}, publisher = {IEEE}, timestamp = {2019-10-22T13:46:36.000+0200}, title = {Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.}, url = {http://dblp.uni-trier.de/db/conf/i2mtc/i2mtc2014.html#RamagundamDMBGA14}, year = 2014 }