%0 Conference Paper %1 conf/vlsid/ChattopadhyayR03 %A Chattopadhyay, Santanu %A Reddy, K. Sudarsana %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 341-346 %T Genetic Algorithm based Test Scheduling and Test Access Mechanism Design for System-on-Chips. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#ChattopadhyayR03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/ChattopadhyayR03, added-at = {2023-03-24T00:00:00.000+0100}, author = {Chattopadhyay, Santanu and Reddy, K. Sudarsana}, biburl = {https://www.bibsonomy.org/bibtex/2d79aba27d97c3391fc56aa7a921d8ae9/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183160}, interhash = {5ca16210d4c9bf0a88d579737168a418}, intrahash = {d79aba27d97c3391fc56aa7a921d8ae9}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {341-346}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:49.000+0200}, title = {Genetic Algorithm based Test Scheduling and Test Access Mechanism Design for System-on-Chips.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#ChattopadhyayR03}, year = 2003 }