%0 Conference Paper %1 conf/eurodac/BurgunDGPS94 %A Burgun, Luc %A Dictus, N. %A Greiner, Alain %A Pradho, E. %A Sarwary, C. %B EDAC-ETC-EUROASIC %D 1994 %E Werner, Robert %I IEEE Computer Society %K dblp %P 669 %T Multilevel Logic Synthesis of Very High Complexity Circuits. %U http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#BurgunDGPS94 %@ 0-8186-5410-4

@inproceedings{conf/eurodac/BurgunDGPS94, added-at = {2017-05-24T00:00:00.000+0200}, author = {Burgun, Luc and Dictus, N. and Greiner, Alain and Pradho, E. and Sarwary, C.}, biburl = {https://www.bibsonomy.org/bibtex/2e74a49f3747bc08b442f1ddc88444de3/dblp}, booktitle = {EDAC-ETC-EUROASIC}, crossref = {conf/eurodac/1994edac}, editor = {Werner, Robert}, ee = {https://doi.org/10.1109/EDTC.1994.326795}, interhash = {8843ef7393dc466d69e905eee86b79a0}, intrahash = {e74a49f3747bc08b442f1ddc88444de3}, isbn = {0-8186-5410-4}, keywords = {dblp}, pages = 669, publisher = {IEEE Computer Society}, timestamp = {2019-10-17T22:26:24.000+0200}, title = {Multilevel Logic Synthesis of Very High Complexity Circuits.}, url = {http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#BurgunDGPS94}, year = 1994 }