%0 Conference Paper %1 conf/iscas/SvenssonLO07 %A Svensson, Henrik %A Lenart, Thomas %A Öwall, Viktor %B ISCAS %D 2007 %I IEEE %K dblp %P 3972-3975 %T Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#SvenssonLO07 %@ 1-4244-0921-7

@inproceedings{conf/iscas/SvenssonLO07, added-at = {2016-05-20T00:00:00.000+0200}, author = {Svensson, Henrik and Lenart, Thomas and Öwall, Viktor}, biburl = {https://www.bibsonomy.org/bibtex/2edab2cefd6cc4c311361fc335b033638/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2007}, ee = {http://dx.doi.org/10.1109/ISCAS.2007.378670}, interhash = {766468f5f818b938c473ab19fee187ea}, intrahash = {edab2cefd6cc4c311361fc335b033638}, isbn = {1-4244-0921-7}, keywords = {dblp}, pages = {3972-3975}, publisher = {IEEE}, timestamp = {2016-05-21T12:14:31.000+0200}, title = {Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#SvenssonLO07}, year = 2007 }