%0 Journal Article %1 journals/tie/XuZZLZQZ24 %A Xu, Han %A Zheng, Jialin %A Zeng, Yangbin %A Liu, Weicheng %A Zhao, Fuhai %A Qu, Chunhui %A Zhao, Zhengming %D 2024 %J IEEE Trans. Ind. Electron. %K dblp %N 7 %P 7158-7168 %T Topology-Aware Matrix Partitioning Method for FPGA Real-Time Simulation of Power Electronics Systems. %U http://dblp.uni-trier.de/db/journals/tie/tie71.html#XuZZLZQZ24 %V 71

@article{journals/tie/XuZZLZQZ24, added-at = {2024-05-04T00:00:00.000+0200}, author = {Xu, Han and Zheng, Jialin and Zeng, Yangbin and Liu, Weicheng and Zhao, Fuhai and Qu, Chunhui and Zhao, Zhengming}, biburl = {https://www.bibsonomy.org/bibtex/2f2e4678fc836f38cf4c3ef8832ab1e0e/dblp}, ee = {https://doi.org/10.1109/TIE.2023.3308137}, interhash = {3a0dd93a65cb243270675dcdf8a9d7e9}, intrahash = {f2e4678fc836f38cf4c3ef8832ab1e0e}, journal = {IEEE Trans. Ind. Electron.}, keywords = {dblp}, number = 7, pages = {7158-7168}, timestamp = {2024-05-06T07:02:41.000+0200}, title = {Topology-Aware Matrix Partitioning Method for FPGA Real-Time Simulation of Power Electronics Systems.}, url = {http://dblp.uni-trier.de/db/journals/tie/tie71.html#XuZZLZQZ24}, volume = 71, year = 2024 }