%0 Conference Paper %1 conf/dsd/FarooqCACRKM16 %A Farooq, Umer %A Chotin-Avot, Roselyne %A Azeem, Muhammad Moazam %A Cherif, Zouha %A Ravoson, Maminionja %A Khan, Saqib %A Mehrez, Habib %B DSD %D 2016 %E Kitsos, Paris %I IEEE Computer Society %K dblp %P 641-645 %T Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2016.html#FarooqCACRKM16 %@ 978-1-5090-2817-7

@inproceedings{conf/dsd/FarooqCACRKM16, added-at = {2023-03-23T00:00:00.000+0100}, author = {Farooq, Umer and Chotin-Avot, Roselyne and Azeem, Muhammad Moazam and Cherif, Zouha and Ravoson, Maminionja and Khan, Saqib and Mehrez, Habib}, biburl = {https://www.bibsonomy.org/bibtex/2f36a3bb661fc8581cfc83672ff9f378f/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2016}, editor = {Kitsos, Paris}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSD.2016.93}, interhash = {049f5876b1d4b0ec1219c46714ceab5f}, intrahash = {f36a3bb661fc8581cfc83672ff9f378f}, isbn = {978-1-5090-2817-7}, keywords = {dblp}, pages = {641-645}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:11:20.000+0200}, title = {Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2016.html#FarooqCACRKM16}, year = 2016 }