%0 Conference Paper %1 conf/vlsi/Jensen93 %A Jensen, Poul Martin Rands %B VLSI %D 1993 %E Yanagawa, Kakayuki %E Ivey, Peter A. %I North-Holland %K dblp %P 73-82 %T An ASIC array architecture for the DITPOS algorithm. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsi1993.html#Jensen93 %V A-42 %@ 0-444-89911-1

@inproceedings{conf/vlsi/Jensen93, added-at = {2002-01-03T00:00:00.000+0100}, author = {Jensen, Poul Martin Rands}, biburl = {https://www.bibsonomy.org/bibtex/2f6bf40487a6f57ed30cba6bdea983282/dblp}, booktitle = {VLSI}, crossref = {conf/vlsi/1993}, date = {2002-01-03}, description = {dblp}, editor = {Yanagawa, Kakayuki and Ivey, Peter A.}, interhash = {8560420d6f655f2177607dd278a5b892}, intrahash = {f6bf40487a6f57ed30cba6bdea983282}, isbn = {0-444-89911-1}, keywords = {dblp}, pages = {73-82}, publisher = {North-Holland}, series = {IFIP Transactions}, timestamp = {2002-01-03T00:00:00.000+0100}, title = {An ASIC array architecture for the DITPOS algorithm.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsi1993.html#Jensen93}, volume = {A-42}, year = 1993 }