%0 Conference Paper %1 conf/vlsid/AgrawalGLT94 %A Agrawal, Prathima %A Goil, Sanjay %A Liu, Sally %A Trotter, John A. %B VLSI Design %D 1994 %I IEEE Computer Society %K dblp %P 45-48 %T Parallel Model Evaluation for Circuit Simulation on the PACE Multiprocessor. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1994.html#AgrawalGLT94 %@ 0-8186-4990-9

@inproceedings{conf/vlsid/AgrawalGLT94, added-at = {2023-03-24T00:00:00.000+0100}, author = {Agrawal, Prathima and Goil, Sanjay and Liu, Sally and Trotter, John A.}, biburl = {https://www.bibsonomy.org/bibtex/27c513d71b0bc8c790fa4ce6b8910a826/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1994}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1994.282653}, interhash = {3136c6c626f8a27e0ba5e288c74ad44b}, intrahash = {7c513d71b0bc8c790fa4ce6b8910a826}, isbn = {0-8186-4990-9}, keywords = {dblp}, pages = {45-48}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:47:03.000+0200}, title = {Parallel Model Evaluation for Circuit Simulation on the PACE Multiprocessor.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1994.html#AgrawalGLT94}, year = 1994 }