%0 Conference Paper %1 conf/aspdac/RabieiP99 %A Rabiei, Payam %A Pedram, Massoud %B ASP-DAC %D 1999 %I IEEE Computer Society %K dblp %P 237- %T Model Order Reduction of Large Circuits Using Balanced Truncation. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac1999.html#RabieiP99 %@ 0-7803-5012-X

@inproceedings{conf/aspdac/RabieiP99, added-at = {2023-03-23T00:00:00.000+0100}, author = {Rabiei, Payam and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/28a3f0bc0779dc6a501899943abdfd136/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/1999}, ee = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.760004}, interhash = {319f187df3a324d78d3b2668234d94a4}, intrahash = {8a3f0bc0779dc6a501899943abdfd136}, isbn = {0-7803-5012-X}, keywords = {dblp}, pages = {237-}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T20:42:58.000+0200}, title = {Model Order Reduction of Large Circuits Using Balanced Truncation.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac1999.html#RabieiP99}, year = 1999 }