%0 Conference Paper %1 conf/islped/ZhangG17 %A Zhang, Chao %A Guo, Xiaochen %B ISLPED %D 2017 %I IEEE %K dblp %P 1-6 %T Enabling efficient fine-grained DRAM activations with interleaved I/O. %U http://dblp.uni-trier.de/db/conf/islped/islped2017.html#ZhangG17 %@ 978-1-5090-6023-8

@inproceedings{conf/islped/ZhangG17, added-at = {2017-08-17T00:00:00.000+0200}, author = {Zhang, Chao and Guo, Xiaochen}, biburl = {https://www.bibsonomy.org/bibtex/29c3ee90d84ec67b49b3dec573ee58e38/dblp}, booktitle = {ISLPED}, crossref = {conf/islped/2017}, ee = {https://doi.org/10.1109/ISLPED.2017.8009201}, interhash = {34e80123a4cc79e89975c6c131abde03}, intrahash = {9c3ee90d84ec67b49b3dec573ee58e38}, isbn = {978-1-5090-6023-8}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2017-08-18T11:41:07.000+0200}, title = {Enabling efficient fine-grained DRAM activations with interleaved I/O.}, url = {http://dblp.uni-trier.de/db/conf/islped/islped2017.html#ZhangG17}, year = 2017 }