%0 Journal Article %1 journals/tcad/DevarayanadurgSGH99 %A Devarayanadurg, Giri %A Soma, Mani %A Goteti, Prashant %A Huynh, Sam D. %D 1999 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 7 %P 1026-1039 %T Test set selection for structural faults in analog IC's. %U http://dblp.uni-trier.de/db/journals/tcad/tcad18.html#DevarayanadurgSGH99 %V 18

@article{journals/tcad/DevarayanadurgSGH99, added-at = {2020-09-24T00:00:00.000+0200}, author = {Devarayanadurg, Giri and Soma, Mani and Goteti, Prashant and Huynh, Sam D.}, biburl = {https://www.bibsonomy.org/bibtex/23ff206d66b8d14c2314b267e9175ad08/dblp}, ee = {https://doi.org/10.1109/43.771183}, interhash = {3cd7d0c7f17829514bf818917c6dad34}, intrahash = {3ff206d66b8d14c2314b267e9175ad08}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 7, pages = {1026-1039}, timestamp = {2020-09-25T11:49:03.000+0200}, title = {Test set selection for structural faults in analog IC's.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad18.html#DevarayanadurgSGH99}, volume = 18, year = 1999 }