%0 Conference Paper %1 conf/asscc/YuffeVSKK11 %A Yuffe, Marcelo %A Vikinski, Omer %A Shmuely, Ziv %A Knoll, Ernest %A Kurts, Tsvika %B A-SSCC %D 2011 %I IEEE %K dblp %P 13-16 %T The Second Generation Intel® Core™: A highly integrated high performance multi IA-core and processor graphics chip. %U http://dblp.uni-trier.de/db/conf/asscc/asscc2011.html#YuffeVSKK11 %@ 978-1-4577-1784-0

@inproceedings{conf/asscc/YuffeVSKK11, added-at = {2017-03-29T00:00:00.000+0200}, author = {Yuffe, Marcelo and Vikinski, Omer and Shmuely, Ziv and Knoll, Ernest and Kurts, Tsvika}, biburl = {https://www.bibsonomy.org/bibtex/2d712619d338c890af7d66dab5c3c12b7/dblp}, booktitle = {A-SSCC}, crossref = {conf/asscc/2011}, ee = {http://dx.doi.org/10.1109/ASSCC.2011.6123652}, interhash = {3e01a9eb55fe2bcda2e359a67f51bfd7}, intrahash = {d712619d338c890af7d66dab5c3c12b7}, isbn = {978-1-4577-1784-0}, keywords = {dblp}, pages = {13-16}, publisher = {IEEE}, timestamp = {2017-03-30T12:11:56.000+0200}, title = {The Second Generation Intel® Core™: A highly integrated high performance multi IA-core and processor graphics chip.}, url = {http://dblp.uni-trier.de/db/conf/asscc/asscc2011.html#YuffeVSKK11}, year = 2011 }