%0 Journal Article %1 journals/cee/ShahadiJW16 %A Shahadi, Haider Ismael %A Jidin, Razali %A Way, Wong Hung %D 2016 %J Comput. Electr. Eng. %K dblp %P 95-116 %T Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA. %U http://dblp.uni-trier.de/db/journals/cee/cee49.html#ShahadiJW16 %V 49

@article{journals/cee/ShahadiJW16, added-at = {2020-02-19T00:00:00.000+0100}, author = {Shahadi, Haider Ismael and Jidin, Razali and Way, Wong Hung}, biburl = {https://www.bibsonomy.org/bibtex/24f2c651b1f2e7c170b717579085d92a7/dblp}, ee = {https://doi.org/10.1016/j.compeleceng.2015.03.007}, interhash = {47344ccf464a679d695215dde9cb18ec}, intrahash = {4f2c651b1f2e7c170b717579085d92a7}, journal = {Comput. Electr. Eng.}, keywords = {dblp}, pages = {95-116}, timestamp = {2020-02-20T12:04:38.000+0100}, title = {Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA.}, url = {http://dblp.uni-trier.de/db/journals/cee/cee49.html#ShahadiJW16}, volume = 49, year = 2016 }