%0 Conference Paper %1 conf/ismvl/Al-WardiWD16 %A Al-Wardi, Zaid %A Wille, Robert %A Drechsler, Rolf %B ISMVL %D 2016 %I IEEE Computer Society %K %P 31-36 %T Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits. %U http://dblp.uni-trier.de/db/conf/ismvl/ismvl2016.html#Al-WardiWD16 %@ 978-1-4673-9489-5

@inproceedings{conf/ismvl/Al-WardiWD16, added-at = {2023-12-12T22:51:05.000+0100}, author = {Al-Wardi, Zaid and Wille, Robert and Drechsler, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/23c8eed1c686c70128ac3af8e927e0a17/admin}, booktitle = {ISMVL}, crossref = {conf/ismvl/2016}, ee = {https://www.wikidata.org/entity/Q59242074}, interhash = {4edcd509927d1f78f44a3fb23d68dfab}, intrahash = {3c8eed1c686c70128ac3af8e927e0a17}, isbn = {978-1-4673-9489-5}, keywords = {}, pages = {31-36}, publisher = {IEEE Computer Society}, timestamp = {2023-12-12T22:51:05.000+0100}, title = {Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits.}, url = {http://dblp.uni-trier.de/db/conf/ismvl/ismvl2016.html#Al-WardiWD16}, year = 2016 }