%0 Conference Paper %1 conf/icecsys/GervasoniCF16 %A Gervasoni, Giacomo %A Carminati, Marco %A Ferrari, Giorgio %B ICECS %D 2016 %I IEEE %K dblp %P 117-120 %T FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2016.html#GervasoniCF16 %@ 978-1-5090-6113-6

@inproceedings{conf/icecsys/GervasoniCF16, added-at = {2018-11-02T00:00:00.000+0100}, author = {Gervasoni, Giacomo and Carminati, Marco and Ferrari, Giorgio}, biburl = {https://www.bibsonomy.org/bibtex/243fa138b1ce00a2f2cb7aa76ea344db0/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2016}, ee = {https://doi.org/10.1109/ICECS.2016.7841146}, interhash = {4f528d4b9ef5b9847052ba84ec5b5793}, intrahash = {43fa138b1ce00a2f2cb7aa76ea344db0}, isbn = {978-1-5090-6113-6}, keywords = {dblp}, pages = {117-120}, publisher = {IEEE}, timestamp = {2019-10-17T19:54:04.000+0200}, title = {FPGA-based lock-in amplifier with sub-ppm resolution working up to 6 MHz.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2016.html#GervasoniCF16}, year = 2016 }