%0 Conference Paper %1 conf/aspdac/BouchhimaBYBJ05 %A Bouchhima, Aimen %A Bacivarov, Iuliana %A Youssef, Wassim %A Bonaciu, Marius %A Jerraya, Ahmed Amine %B ASP-DAC %D 2005 %E Tang, Tingao %I ACM Press %K dblp %P 969-972 %T Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2005.html#BouchhimaBYBJ05 %@ 0-7803-8737-6

@inproceedings{conf/aspdac/BouchhimaBYBJ05, added-at = {2018-11-06T00:00:00.000+0100}, author = {Bouchhima, Aimen and Bacivarov, Iuliana and Youssef, Wassim and Bonaciu, Marius and Jerraya, Ahmed Amine}, biburl = {https://www.bibsonomy.org/bibtex/25475b93fccd2ab53f15d6eaa4f3ee555/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2005}, editor = {Tang, Tingao}, ee = {https://doi.org/10.1109/ASPDAC.2005.1466501}, interhash = {5a0b28bd641f7ee617af1c2a237fd9ec}, intrahash = {5475b93fccd2ab53f15d6eaa4f3ee555}, isbn = {0-7803-8737-6}, keywords = {dblp}, pages = {969-972}, publisher = {ACM Press}, timestamp = {2019-10-17T16:43:15.000+0200}, title = {Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2005.html#BouchhimaBYBJ05}, year = 2005 }