%0 Conference Paper %1 conf/vlsi-dat/WuCCWC17 %A Wu, Wan-Ning %A Chen, Chen %A Chin, Ching-Yu %A Wang, Chun-Kai %A Chen, Hung-Ming %B VLSI-DAT %D 2017 %I IEEE %K %P 1-4 %T An analytical placer for heterogeneous FPGAs via rough-placed packing. %U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2017.html#WuCCWC17 %@ 978-1-5090-3969-2

@inproceedings{conf/vlsi-dat/WuCCWC17, added-at = {2023-12-12T23:49:00.000+0100}, author = {Wu, Wan-Ning and Chen, Chen and Chin, Ching-Yu and Wang, Chun-Kai and Chen, Hung-Ming}, biburl = {https://www.bibsonomy.org/bibtex/29cf0171e7d558ccd4095764694719f84/admin}, booktitle = {VLSI-DAT}, crossref = {conf/vlsi-dat/2017}, ee = {https://doi.org/10.1109/VLSI-DAT.2017.7939659}, interhash = {5aab99ae3cf294aa5d312cbee2ec5d41}, intrahash = {9cf0171e7d558ccd4095764694719f84}, isbn = {978-1-5090-3969-2}, keywords = {}, pages = {1-4}, publisher = {IEEE}, timestamp = {2023-12-12T23:49:00.000+0100}, title = {An analytical placer for heterogeneous FPGAs via rough-placed packing.}, url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2017.html#WuCCWC17}, year = 2017 }