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- BibTeX key
- conf/vlsic/LeeSSWCKKKKJKH16
- entry type
- inproceedings
- booktitle
- VLSI Circuits
- year
- 2016
- pages
- 1-2
- publisher
- IEEE
- crossref
- conf/vlsic/2016
- ee
- http://dx.doi.org/10.1109/VLSIC.2016.7573503
- isbn
- 978-1-5090-0635-9
- url
- http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#LeeSSWCKKKKJKH16
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- please select -%0 Conference Paper
%1 conf/vlsic/LeeSSWCKKKKJKH16
%A Lee, Sangheon
%A Song, Jeonghwan
%A Seong, Changhyuk
%A Woo, Jiyong
%A Choi, Jong-Moon
%A Kwon, Soon-Chan
%A Kim, Ho-Joon
%A Kang, Hyun-Suk
%A Kim, Soo Gil
%A Jung, Hoe Gwon
%A Kwon, Kee-Won
%A Hwang, Hyunsang
%B VLSI Circuits
%D 2016
%I IEEE
%K dblp
%P 1-2
%T Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier.
%U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#LeeSSWCKKKKJKH16
%@ 978-1-5090-0635-9
@inproceedings{conf/vlsic/LeeSSWCKKKKJKH16,
added-at = {2016-09-26T00:00:00.000+0200},
author = {Lee, Sangheon and Song, Jeonghwan and Seong, Changhyuk and Woo, Jiyong and Choi, Jong-Moon and Kwon, Soon-Chan and Kim, Ho-Joon and Kang, Hyun-Suk and Kim, Soo Gil and Jung, Hoe Gwon and Kwon, Kee-Won and Hwang, Hyunsang},
biburl = {https://www.bibsonomy.org/bibtex/2ae7810b8b3820134b46eb892d155fcc2/dblp},
booktitle = {VLSI Circuits},
crossref = {conf/vlsic/2016},
ee = {http://dx.doi.org/10.1109/VLSIC.2016.7573503},
interhash = {5e520ab9dae23cf547c7029b7505df92},
intrahash = {ae7810b8b3820134b46eb892d155fcc2},
isbn = {978-1-5090-0635-9},
keywords = {dblp},
pages = {1-2},
publisher = {IEEE},
timestamp = {2016-09-27T11:36:21.000+0200},
title = {Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier.},
url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#LeeSSWCKKKKJKH16},
year = 2016
}