%0 Journal Article %1 journals/jssc/HazuchaKWBTMSDN04 %A Hazucha, Peter %A Karnik, Tanay %A Walstra, Steven %A Bloechel, Bradley A. %A Tschanz, James W. %A Maiz, Jose %A Soumyanath, Krishnamurthy %A Dermer, Gregory E. %A Narendra, Siva G. %A De, Vivek %A Borkar, Shekhar %D 2004 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 1536-1543 %T Measurements and analysis of SER-tolerant latch in a 90-nm dual-VT CMOS process. %U http://dblp.uni-trier.de/db/journals/jssc/jssc39.html#HazuchaKWBTMSDN04 %V 39

@article{journals/jssc/HazuchaKWBTMSDN04, added-at = {2022-04-27T00:00:00.000+0200}, author = {Hazucha, Peter and Karnik, Tanay and Walstra, Steven and Bloechel, Bradley A. and Tschanz, James W. and Maiz, Jose and Soumyanath, Krishnamurthy and Dermer, Gregory E. and Narendra, Siva G. and De, Vivek and Borkar, Shekhar}, biburl = {https://www.bibsonomy.org/bibtex/24daf0b25e7bca6c690c7f442f372a9c0/dblp}, ee = {https://doi.org/10.1109/JSSC.2004.831449}, interhash = {6d95cf3972b196a7bcf09c7e0b4817f6}, intrahash = {4daf0b25e7bca6c690c7f442f372a9c0}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = {1536-1543}, timestamp = {2024-04-08T10:43:52.000+0200}, title = {Measurements and analysis of SER-tolerant latch in a 90-nm dual-VT CMOS process.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc39.html#HazuchaKWBTMSDN04}, volume = 39, year = 2004 }