%0 Conference Paper %1 conf/fpl/FeilenISS12 %A Feilen, Michael %A Ihmig, Matthias %A Schwarzbauer, Christian %A Stechele, Walter %B FPL %D 2012 %E Koch, Dirk %E Singh, Satnam %E Tørresen, Jim %I IEEE %K dblp %P 75-82 %T Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2012.html#FeilenISS12 %@ 978-1-4673-2257-7

@inproceedings{conf/fpl/FeilenISS12, added-at = {2017-05-21T00:00:00.000+0200}, author = {Feilen, Michael and Ihmig, Matthias and Schwarzbauer, Christian and Stechele, Walter}, biburl = {https://www.bibsonomy.org/bibtex/23a414417b599f914b1e72ceb0a769567/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2012}, editor = {Koch, Dirk and Singh, Satnam and Tørresen, Jim}, ee = {https://doi.org/10.1109/FPL.2012.6339244}, interhash = {6daf0bacbf5f6288cee4d830caa9af4d}, intrahash = {3a414417b599f914b1e72ceb0a769567}, isbn = {978-1-4673-2257-7}, keywords = {dblp}, pages = {75-82}, publisher = {IEEE}, timestamp = {2019-10-17T19:14:05.000+0200}, title = {Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2012.html#FeilenISS12}, year = 2012 }