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%0 Conference Paper
%1 conf/scsc/ColmenarGLH10
%A Colmenar, J. Manuel
%A Garnica, Oscar
%A Lanchares, Juan
%A Hidalgo, José Ignacio
%B SummerSim
%D 2010
%I Society for Computer Simulation International / ACM DL
%K dblp
%P 56-63
%T Simulating a LAGS processor to consider variable latency on L1 D-Cache.
%U http://dblp.uni-trier.de/db/conf/scsc/scsc2010.html#ColmenarGLH10
@inproceedings{conf/scsc/ColmenarGLH10,
added-at = {2011-06-29T00:00:00.000+0200},
author = {Colmenar, J. Manuel and Garnica, Oscar and Lanchares, Juan and Hidalgo, José Ignacio},
biburl = {https://www.bibsonomy.org/bibtex/2a7e5d96f22a1274a007ba5a22478164d/dblp},
booktitle = {SummerSim},
crossref = {conf/scsc/2010},
ee = {http://portal.acm.org/citation.cfm?id=1999421&CFID=29315481&CFTOKEN=81718596},
interhash = {71e9a4575d69424901fb5632910d9643},
intrahash = {a7e5d96f22a1274a007ba5a22478164d},
keywords = {dblp},
pages = {56-63},
publisher = {Society for Computer Simulation International / ACM DL},
timestamp = {2011-06-30T11:45:01.000+0200},
title = {Simulating a LAGS processor to consider variable latency on L1 D-Cache.},
url = {http://dblp.uni-trier.de/db/conf/scsc/scsc2010.html#ColmenarGLH10},
year = 2010
}